By Sharon Rosenberg, Kathleen Meade
With either cookbook-style examples and in-depth verification heritage, amateur and specialist verification engineers will locate info to ease their adoption of this rising Accellera commonplace.
Read Online or Download A Practical Guide to Adopting the Universal Verification Methodology (UVM) PDF
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SPACE PLANNING AND INTERFACE 30 9. Special board materials may be required for leadless components to prevent solder joint failure induced by various mechanical stresses. o- 1 Typical Insertion Mount Board Layout -ο -o ο —ο ο Ο— —ο ο- ο- -ο ο— Ο—ο -ο ο—ο I o— "° —Ο Γ~° -ο —ο ΤΙ/ΗΗ/β607-10 Typical Surface Mount Board Layout Fig. 2-1: When utilizing SMT conductor lithog raphy will typically have to be improved from 12 mil lines/12 mil spaces to 8 mil lines/8 mil spaces. Standards for SMT Components The selection of a suitable surface mounted equivalent to a comparable leaded device is a critical step which requires more than a casual look through the various component directories and data sheets.
Fig. 2-35 shows the airflowtest setup. TEST DEVICE PART STAND-OFF TEST BOARD PLASTIC PIN SUPPORT - CONNECTION PINS Fig. 2-34: Cross-section of test device soldered to test board. SPACE PLANNING AND INTERFACE 62 SO DEVICES PLCC DEVICES SO Devices PLCC Devices Fig. 2-34: Airflowtest setup. 75 inch) to give a 6 C A (caseto-ambient) approaching zero. 040" diameter sheath, grounded junction type K) mounted flush with heat sink surface and centered below die in the test device. Figure 2-35 shows the6 JC test mounting for a PLCC device.
A small spacer is used between the hold-down mechanism and PLCC bottom pedestal. Small hook up wires and thermal grease are used as with the SO setup. Figure 2-35 shows the PLCC mounting. Data Presentation The data presented here was run at constant power dissipation for each pack age type. The power dissipation used is given under Test Conditions for each graph. Higher or lower power dissipation will have a slight effect on thermal resistance. The general trend of thermal resistance decreasing with increasing power is common to all packages.